All defined R&D test procedures are listed here. These tests are meant as a tool for Ettus R&D to enable faster and more reliable development. Note these tests are no replacement for manufacturing or production tests, and should not be treated as such. Instead, they are meant to catch common failure modes during development. As a result, test definitions are fairly light-weight.
Test Code | Device | Peripherals | Manual Test Procedure | Automatic Test Procedure |
---|---|---|---|---|
GPS-X310-TCXO-v1 | USRP X310 | Jackson Labs TCXO | GPSDO: Manual Test Procedure | GPSDO: Automatic Test Procedure |
GPS-X310-OCXO-v1 | USRP X310 | Jackson Labs OCXO | GPSDO: Manual Test Procedure | GPSDO: Automatic Test Procedure |
GPS-X300-TCXO-v1 | USRP X300 | Jackson Labs TCXO | GPSDO: Manual Test Procedure | GPSDO: Automatic Test Procedure |
GPS-X300-OCXO-v1 | USRP X300 | Jackson Labs OCXO | GPSDO: Manual Test Procedure | GPSDO: Automatic Test Procedure |
GPS-B200-TCXO-v1 | USRP B200 | Jackson Labs TCXO | GPSDO: Manual Test Procedure | GPSDO: Automatic Test Procedure |
GPS-B210-TCXO-v1 | USRP B210 | Jackson Labs TCXO | GPSDO: Manual Test Procedure | GPSDO: Automatic Test Procedure |
For cursory testing, not all tests within a device family are required (e.g., only testing the OCXO on any X-Series, and testing the TCXO on any B-Series is sufficient).
The following tests are recommended for a minimum test (N stands for the latest version of this test):
All of these tests require a device that is GPSDO capable (e.g., X3x0, B2x0, N2x0). For those devices that have a separate GPS component (such as the Jackson Labs GPSDOs), this component is also required (called the "peripheral" in the following).
All of these tests must pass for a 'pass' validation.
tbd
The devtests are hardware tests built in to the UHD make system. They can be run directly from the build directory and require no configuration. Devtests are designed to always run, regardless of the actual device configuration. This means, by definition, that devtests cannot require special cabling, specific daughtercards, etc.
Note: The actual devtests can change, since they're part of the code. This does not require a version bump on the test code.
Devtests are only defined for some devices. When running a devtest, all peripherals must be disconnected (e.g., no daughterboards on the X-Series, no GPSDOs on the B- and X-Series).
Running these tests requires the yaml package. On Ubuntu, run sudo apt-get install python-yaml to install the Python 2 version of the YAML library.
Note: The test codes with an 'm' suffix refer to B200mini and B205mini, respectively.
$DEVTEST_DIR/run_testsuite.py --src-dir $DEVTEST_DIR \ --devtest-pattern e3xx \ --build-type na \ --build-dir $BUILD_DIR \ --args type=e3x0 \ --log-dir $LOG_DIR
As all these tests can be run unsupervised, they can be run automatically given the correct device setup. The return code of the tests can be used to check for pass/fail conditions (return code 0 means 'pass').
Test benches provide a faster way to verify the design through simulations.
Test Code | Device | Peripherals | Manual Test Procedure | Automatic Test Procedure |
---|---|---|---|---|
FPGATB-v1 | None | None | Manual Test Procedure | Automatic Test Procedure |
These tests are simulations and do not need any device. Vivado 15.4 should be installed.
Failing tests can be debugged by checking the waveform in a Vivado GUI by running 'make GUI=1 xsim'. More details on debugging: https://kb.ettus.com/Debugging_FPGA_images
Go to <fpga-dir>/usrp3/ and run 'build.py xsim all'. All tests should report 'PASS'.
This procedure tests the DDC and DUC signal quality and the block's capability to change sample rate while streaming.
tbd
The FPGA functional verification tests exercise the Digital Downconverter (DDC), Digital Upconverter (DUC), and Radio Core RFNoC blocks.
This procedure verifies that the DDC, DUC, and Radio Core can run at various sample rates and channel configurations without any data flow issues.
Channels | Sample Rates | Duration | Notes |
---|---|---|---|
1x RX | 10e6, 50e6, 100e6, 200e6 | 60 | Test both channels |
2x RX | 10e6, 50e6, 100e6 | 60 | |
2x RX | 200e6 | 60 | 2x 10G, XG only |
1x TX | 10e6, 50e6, 100e6, 200e6 | 60 | Test both channels |
2x TX | 10e6, 50e6, 100e6 | 60 | |
1x RX & 1x TX | 10e6, 50e6, 100e6 | 60 | Test both channels |
1x RX & 1x TX | 200e6 | 60 | Use channel 0 |
2x RX & 2x TX | 10e6, 50e6 | 60 | |
1x RX & 1x TX | 200e6 | 600 | Use channel 1 |
2x RX & 2x TX | 100e6 | 600 |
Channels | Sample Rates | Duration |
---|---|---|
1x RX | 1e6, 10e6, 25e6 | 60 |
2x RX | 1e6, 10e6 | 60 |
1x TX | 1e6, 10e6, 25e6 | 60 |
2x TX | 1e6, 10e6 | 60 |
1x RX & 1x TX | 1e6, 10e6, 25e6 | 60 |
2x RX & 2x TX | 1e6, 10e6 | 60 |
Channels | Sample Rates | Duration |
---|---|---|
1x RX | 10e6, 50e6, 100e6, 200e6 | 60 |
2x RX | 10e6, 50e6, 100e6 | 60 |
1x TX | 10e6, 50e6, 100e6, 200e6 | 60 |
2x TX | 10e6, 50e6, 100e6 | 60 |
1x RX & 1x TX | 10e6, 50e6, 100e6 | 60 |
1x RX & 1x TX | 200e6 | 60 |
2x RX & 2x TX | 10e6, 50e6 | 60 |
Note: On TX tests, initial Us within the first 5 seconds can be ignored and do not fail the test
Channels | Master Clock Rate | Sample Rate | Duration | Notes |
---|---|---|---|---|
1x RX | 10e6 | 1e6 | 60 | Test both channels |
1x RX | 61.44e6 | 3.84e6 | 60 | Test both channels |
1x TX | 10e6 | 1e6 | 60 | Test both channels |
1x TX | 61.44e6 | 3.84e6 | 60 | Test both channels |
2x RX | 10e6 | 1e6 | 60 | |
2x RX | 30.72e6 | 1.92e6 | 60 | |
2x TX | 10e6 | 1e6 | 60 | |
2x TX | 30.72e6 | 1.92e6 | 60 | |
1x RX & 1x TX | 10e6 | 1e6 | 60 | Test both channels |
1x RX & 1x TX | 30.72e6 | 3.84e6 | 60 | Use channel 1 |
2x RX & 2x TX | 10e6 | 1e6 | 60 | |
2x RX & 2x TX | 30.72e6 | 1.92e6 | 60 | |
1x RX & 1x TX | 30.72e6 | 3.84e6 | 600 | Use channel 0 |
2x RX & 2x TX | 30.72e6 | 1.92e6 | 600 |
Channels | Master Clock Rate | Sample Rate | Duration | Notes |
---|---|---|---|---|
1x RX | 15.36e6 | 15.36e6 | 60 | Test both channels |
1x RX | 61.44e6 | 3.84e6 | 60 | Test both channels |
1x TX | 15.36e6 | 15.36e6 | 60 | Test both channels |
1x TX | 61.44e6 | 3.84e6 | 60 | Test both channels |
2x RX | 61.44e6 | 7.68e6 | 60 | |
2x RX | 30.72e6 | 1.92e6 | 60 | |
2x TX | 61.44e6 | 7.68e6 | 60 | |
2x TX | 30.72e6 | 1.92e6 | 60 | |
1x RX & 1x TX | 30.72e6 | 7.68e6 | 60 | Test both channels |
1x RX & 1x TX | 61.44e6 | 1.92e6 | 60 | Use channel 1 |
2x RX & 2x TX | 30.72e6 | 3.84e6 | 60 | |
2x RX & 2x TX | 30.72e6 | 1.92e6 | 60 | |
1x RX & 1x TX | 30.72e6 | 3.84e6 | 600 | Use channel 0 |
2x RX & 2x TX | 30.72e6 | 1.92e6 | 600 |
Channels | Master Clock Rate | Sample Rate | Duration | Notes |
---|---|---|---|---|
1x RX | 61.44e6 | 1.92e6, 61.44e6 | 60 | Test both channels |
1x TX | 61.44e6 | 1.92e6, 61.44e6 | 60 | Test both channels |
2x RX | 30.72e6 | 1.92e6, 30.72e6 | 60 | |
2x TX | 30.72e6 | 1.92e6, 30.72e6 | 60 | |
1x RX & 1x TX | 61.44e6 | 1.92e6, 30.72e6 | 60 | Test both channels |
2x RX & 2x TX | 30.72e6 | 1.92e6, 30.72e6 | 60 | |
1x RX & 1x TX | 61.44e6 | 1.92e6, 30.72e6 | 600 | Use channel 0 |
2x RX & 2x TX | 30.72e6 | 1.92e6, 30.72e6 | 600 |
Channels | Master Clock Rate | Sample Rates | Duration | Notes |
---|---|---|---|---|
1x RX | 125e6 | 1.25e6 | 60 | One test each for all 4 channels |
1x RX | 122.88e6 | 1.2288e6 | 60 | One test each for all 4 channels |
1x RX | 153.6e6 | 1.536e6 | 60 | One test each for all 4 channels |
1x TX | 125e6 | 1.25e6 | 60 | One test each for all 4 channels |
1x TX | 122.88e6 | 1.2288e6 | 60 | One test each for all 4 channels |
1x TX | 153.6e6 | 1.536e6 | 60 | One test each for all 4 channels |
2/3/4x RX | 125e6 | 1.25e6 | 60 | 3 tests total |
2/3/4x RX | 122.88e6 | 1.2288e6 | 60 | 3 tests total |
2/3/4x RX | 153.6e6 | 1.536e6 | 60 | 3 tests total |
2/3/4x TX | 125e6 | 1.25e6 | 60 | 3 tests total |
2/3/4x TX | 122.88e6 | 1.2288e6 | 60 | 3 tests total |
2/3/4x TX | 153.6e6 | 1.536e6 | 60 | 3 tests total |
4x RX & 4x TX | 125e6 | 1.25e6 | 60 | Drop to 2 channels for N300 |
4x RX & 4x TX | 122.88e6 | 1.2288e6 | 60 | Drop to 2 channels for N300 |
4x RX & 4x TX | 153e6 | 1.536e6 | 60 | Drop to 2 channels for N300 |
Channels | Master Clock Rate | Sample Rates | Duration | Notes |
---|---|---|---|---|
1x RX | 125e6 | 1.25e6, 125e6 | 60 | One test each for all 4 channels |
1x RX | 122.88e6 | 1.2288e6, 122.88e6 | 60 | One test each for all 4 channels |
1x RX | 153.6e6 | 1.536e6, 153.6e6 | 60 | One test each for all 4 channels |
1x TX | 125e6 | 1.25e6, 125e6 | 60 | One test each for all 4 channels |
1x TX | 122.88e6 | 1.2288e6, 122.88e6 | 60 | One test each for all 4 channels |
1x TX | 153.6e6 | 1.536e6, 153.6e6 | 60 | One test each for all 4 channels |
2x RX | 125e6 | 1.25e6, 125e6 | 60 | |
2x RX | 122.88e6 | 1.2288e6, 122.88e6 | 60 | |
2x RX | 153.6e6 | 1.536e6 | 60 | |
3x RX | 125e6 | 1.25e6 | 60 | N310 only |
3x RX | 122.88e6 | 1.2288e6 | 60 | N310 only |
3x RX | 153.6e6 | 1.536e6 | 60 | N310 only |
2x TX | 125e6 | 1.25e6, 12.5e6 | 60 | |
2x TX | 122.88e6 | 1.2288e6, 12.288e6 | 60 | |
2x TX | 153.6e6 | 1.536e6, 15.36e6 | 60 | |
3x TX | 125e6 | 1.25e6 | 60 | N310 only |
3x TX | 122.88e6 | 1.2288e6 | 60 | N310 only |
3x TX | 153.6e6 | 1.536e6 | 60 | N310 only |
4x RX | 125e6 | 1.25e6, 62.5e6 | 60 | N310 only |
4x TX | 125e6 | 1.25e6, 12.5e6 | 60 | N310 only |
4x RX & 4x TX | 125e6 | 1.25e6, 62.5e6 | 60 | Drop to 2 channels for N300 |
4x RX & 4x TX | 122.88e6 | 1.2288e6, 61.44e6 | 60 | Drop to 2 channels for N300 |
4x RX & 4x TX | 153e6 | 1.536e6, 76.8e6 | 60 | Drop to 2 channels for N300 |
4x RX & 4x TX | 125e6 | 62.5e6 | 600 | Drop to 2 channels for N300 |
4x RX & 4x TX | 122.88e6 | 61.44e6 | 600 | Drop to 2 channels for N300 |
4x RX & 4x TX | 153e6 | 76.8e6 | 600 | Drop to 2 channels for N300 |
4x RX & 4x TX | 125e6 | 125e6 RX, 62.5e6 TX | 60 | Use dual 10GigE, N310 XG only |
4x RX & 4x TX | 122.88e6 | 122.88e6 RX, 61.44e6 TX | 60 | Use dual 10GigE, N310 XG only |
2x RX & 2x TX | 125e6 | 125e6 RX, 62.5e6 TX | 60 | Use dual 10GigE, N300 XG only |
2x RX & 2x TX | 122.88e6 | 122.88e6 RX, 61.44e6 TX | 60 | Use dual 10GigE, N300 XG only |
2x RX & 2x TX | 153e6 | 153e6 RX, 76.8e6 TX | 60 | Use dual 10GigE, N300 XG only |
Channels | Master Clock Rate | Sample Rates | Duration | Notes |
---|---|---|---|---|
1x RX | 250e6 | 2.5e6 | 60 | One test each for both channels |
1x RX | 245.76e6 | 2.4576e6 | 60 | One test each for both channels |
1x RX | 200e6 | 2e6 | 60 | One test each for both channels |
1x TX | 250e6 | 2.5e6 | 60 | One test each for both channels |
1x TX | 245.76e6 | 2.4576e6 | 60 | One test each for both channels |
1x TX | 200e6 | 2e6 | 60 | One test each for both channels |
2x RX | 250e6 | 2.5e6 | 60 | |
2x RX | 245.76e6 | 2.4576e6 | 60 | |
2x RX | 200e6 | 2e6 | 60 | |
2x TX | 250e6 | 2.5e6 | 60 | |
2x TX | 245.76e6 | 2.4576e6 | 60 | |
2x TX | 200e6 | 2e6 | 60 | |
2x RX & 2x TX | 250e6 | 2.5e6 | 60 | |
2x RX & 2x TX | 245.76e6 | 2.4576e6 | 60 | |
2x RX & 2x TX | 200e6 | 2e6 | 60 |
Channels | Master Clock Rate | Sample Rates | Duration | Notes |
---|---|---|---|---|
1x RX | 250e6 | 2.5e6 , 125e6 | 60 | One test each for both channels |
1x RX | 245.76e6 | 2.4576e6, 122.88e6 | 60 | One test each for both channels |
1x RX | 200e6 | 2e6 , 200e6 | 60 | One test each for both channels |
1x TX | 250e6 | 2.5e6 , 125e6 | 60 | One test each for both channels |
1x TX | 245.76e6 | 2.4576e6 , 122.88e6 | 60 | One test each for both channels |
1x TX | 200e6 | 2e6 , 100e6 | 60 | One test each for both channels |
2x RX | 250e6 | 2.5e6 , 125e6 | 60 | |
2x RX | 245.76e6 | 2.4576e6, 122.88e6 | 60 | |
2x RX | 200e6 | 2e6 , 100e6 | 60 | |
2x TX | 250e6 | 62.5e6 | 60 | |
2x TX | 245.76e6 | 61.44e6 | 60 | |
2x TX | 200e6 | 100e6 | 60 | |
2x RX & 2x TX | 250e6 | 2.5e6 | 60 | |
2x RX & 2x TX | 245.76e6 | 2.4576e6 | 60 | |
2x RX & 2x TX | 200e6 | 2e6 | 60 | |
2x RX & 2x TX | 250e6 | 125e6 RX, 62.5e6 TX | 600 | |
2x RX & 2x TX | 245.76e6 | 122.88e6 RX, 61.44e6 TX | 600 | |
2x RX & 2x TX | 200e6 | 100e6 RX, 66.67e6 TX | 600 | |
2x RX & 2x TX | 250e6 | 125e6 RX, 83.33e6 TX | 600 | Use dual 10GigE, N320/1 XG only |
2x RX & 2x TX | 245.76e6 | 122.88e6 RX, 81.92e6 TX | 600 | Use dual 10GigE, N320/1 XG only |
2x RX & 2x TX | 200e6 | 200e6 RX, 100e6 TX | 600 | Use dual 10GigE, N320/1 XG only |
2x RX & 2x TX | 250e6 | 250e6 | 600 | Dual 10GigE, N320/1 XG, DPDK only |
2x RX & 2x TX | 245.76e6 | 245.76e6 | 600 | Dual 10GigE, N320/1 XG, DPDK only |
2x RX & 2x TX | 200e6 | 200e6 | 600 | Dual 10GigE, N320/1 XG, DPDK only |
In all cases, make sure UHD is compiled in 'Release' mode (highest optimization), and that all NIC and kernel are set to optimal (CPU governor, ring buffer settings, ...).
The X310/X300 tests depend on the FPGA image to be tested.
-Connect a 1GigE cable into port 0 and a 10GigE cable into port 1. -The following command must pass:
$ usrp_fpga_funcverif x3x0hg -a 192.168.40.2 -2 192.168.10.2 -p /path/to/examples
-Connect 10GigE cables to both ethernet ports. -The following command must pass:
$ usrp_fpga_funcverif x3x0xg -a 192.168.40.2 -2 192.168.30.2 -p /path/to/examples
The N310/N300 tests depend slightly on the type of FPGA image to be tested. All calls to usrp_fpga_funcverif.py need to be adapted to ensure the correct IP addresses and paths to the examples. Also, replace n310 with n300 where appropriate.
$ usrp_fpga_funcverif n310hg -a 192.168.20.2 -2 192.168.10.2 -p /path/to/examples
$ usrp_fpga_funcverif n310xg -a 192.168.10.2 -2 192.168.20.2 -p /path/to/examples
$ usrp_fpga_funcverif n310ha -2 192.168.10.2 -p /path/to/examples
$ usrp_fpga_funcverif n310xa -a 192.168.10.2 -p /path/to/examples
$ usrp_fpga_funcverif n310wx -a 192.168.20.2 -p /path/to/examples
The N320/N321 tests depend slightly on the type of FPGA image to be tested. All calls to usrp_fpga_funcverif.py need to be adapted to ensure the correct IP addresses and paths to the examples. Also, the following test need to be run only on either N320 OR N321.
$ usrp_fpga_funcverif n320hg -a 192.168.20.2 -2 192.168.10.2 -p /path/to/examples
$ usrp_fpga_funcverif n320xg -a 192.168.10.2 -2 192.168.20.2 -p /path/to/examples
$ usrp_fpga_funcverif n320xq -a 192.168.10.2 -2 192.168.20.2 -p /path/to/examples
$ usrp_fpga_funcverif n320aq -a 192.168.10.2 -2 192.168.20.2 -p /path/to/examples
$ usrp_fpga_funcverif n320wx -a 192.168.20.2 -p /path/to/examples
The E310 tests need to be run on the device in the embedded mode.
$ usrp_fpga_funcverif e3xxdev -a 127.0.0.1 -p /path/to/examples
The E320 tests depend on the FPGA image to be tested.
$ usrp_fpga_funcverif e3201g -a 192.168.10.2 -p /path/to/examples
$ usrp_fpga_funcverif e320xg -a 192.168.10.2 -p /path/to/examples
$ usrp_fpga_funcverif e3xxdev -a 127.0.0.1 -p /path/to/examples
Test Code | Device | Peripherals | Manual Test Procedure | Automatic Test Procedure |
---|---|---|---|---|
PHASE-Twin-RX-v1 | 2xTwinRX | 1xX3x0 + LOSharing cables | X3x0 with TwinRX | Automatic phase alignment testing (Receiver) |
PHASE-UBX-40-RX-v1 | 2xUBX-40 | 2xX3x0 | X3x0 with SBX or UBX | Automatic phase alignment testing (Receiver) |
PHASE-UBX-160-RX-v1 | 2xUBX-160 | 2xX3x0 | X3x0 with SBX or UBX | Automatic phase alignment testing (Receiver) |
PHASE-SBX-40-RX-v1 | 2xSBX-40 | 2xX3x0 | X3x0 with SBX or UBX | Automatic phase alignment testing (Receiver) |
PHASE-SBX-120-RX-v1 | 2xSBX-120 | 2xX3x0 | X3x0 with SBX or UBX | Automatic phase alignment testing (Receiver) |
PHASE-N2x0-MIMO-v1 | 2x N2x0 + MIMO cable | 2x SBX | N2x0 MIMO with SBX | Automatic phase alignment testing (Receiver) |
Device | Frequency Range | Number of bands |
---|---|---|
TwinRX | 10 - 6000 MHz | 12 |
UBX-{160, 40} | 10 - 6000 MHz | 12 |
SBX-{120, 40} | 400 - 4400 MHz | 7 |
Phase alignment testing is necessary to verify device synchronization across multiple daughter- and motherboards is working as expected for CBX, SBX and UBX daughterboards. To enable efficient Phase alignment testing a python based test script exists tools/usrptest. It is required for testing RX testcases and later may be required to perform TX testcases.
To test phase alignment we measure phase offset between DUTs at an offset of 2 MHz offset from the selected center frequency. The phase difference for a given center frequency has to stay the same across retunes and power cycles of the DUT.
Correct synchronization with PPS and 10 MHz references is required for these tests.
Equipment Required
Software Required
tbd
Test Code | Device | Peripherals | Manual Test Procedure | Automatic Test Procedure |
---|---|---|---|---|
BIST-N310-v1 | 1xN310 | DB-15 GPIO Loopback | N300/N310 Manual Procedure | N300/N310 Automatic Procedure |
BIST-N300-v1 | 1xN300 | DB-15 GPIO Loopback | N300/N310 Manual Procedure | N300/N310 Automatic Procedure |
BIST-E320-v1 | 1xE320 | Type C HDMI Cable + Breakout board with GPIO Loopback | E320 Manual Procedure | E320 Automatic Procedure |
Some of our devices have built-in self-tests (BISTs).
Note: The N300 and N310 have identical BISTs.
$ n3xx_bist standard # Note: This will run multiple tests $ n3xx_bist gpio
$ uhd_image_loader --args type=n3xx,addr=ni-n3xx-$SERIAL --fpga-path=/path/to/usrp_n310_fpga_AA.bit
Every test will produce a JSON-serialized dictionary. All tests have passed if the "status" key is "true", or the return code for n3xx_bist is 0.
Note: Keep in mind that after the test, an Aurora image is loaded. If this is not desired, re-run uhd_image_loader to load whatever image is requested.
Note: The N300 and N310 have identical BISTs.
Assuming the peripherals described in N300/N310 Manual Procedure are all plugged in, the test can trivially be executed automatically by running
$ n3xx_bist standard $ n3xx_bist gpio $ n3xx_bist sfp_loopback # Or sfp0_loopback and sfp1_loopback
and making sure that all return values are 0.
This is a cable or breakout board which connects to the DB15 connector and loops back the following pins:
$ e320_bist standard # Note: This will run multiple tests $ e320_bist gpio
$ e320_bist sfp_loopback
Every test will produce a JSON-serialized dictionary. All tests have passed if the "status" key is "true", or the return code for e320_bist is 0.
Assuming the peripherals described in E320 Manual Procedure are all plugged in, the test can trivially be executed automatically by running
$ e320_bist standard $ e320_bist gpio $ e320_bist sfp_loopback
and making sure that all return values are 0.
Tests can be added any time to define procedures for pass/fail validation. Any test must include the following:
Basic understanding of the operation of USRPs by the test operator should be assumed when authoring test procedures. The descriptions should be as short as possible to fully describe, unambiguously, how to reach a pass/fail conclusion.
Test procedures may be updated at any time. If this happens, a new test code must be generated, with the version number increased. Old test codes are considered deprecated (if there exists a version 2 of a test, version 1 should not be run any more).