uhd-firmware-4.9.0.1-1 RPM for noarch

From OpenMandriva Cooker for x86_64 / main / release

Firmware files for the Universal Hardware driver (UHD).

Provides

• uhd-firmware

Requires

• rpmlib(CompressedFileNames) <= 3.0.4-1
• rpmlib(FileDigests) <= 4.6.0-1
• rpmlib(PayloadFilesHavePrefix) <= 4.0-1
• rpmlib(PayloadIsZstd) <= 5.4.18-1
• uhd = 4.9.0.1-1

License

GPL-3.0-or-later

Files

/usr/share/uhd/images
/usr/share/uhd/images/LICENSE
/usr/share/uhd/images/bit
/usr/share/uhd/images/bit/usrp_n200_r3_fpga.bit
/usr/share/uhd/images/bit/usrp_n200_r4_fpga.bit
/usr/share/uhd/images/bit/usrp_n210_r3_fpga.bit
/usr/share/uhd/images/bit/usrp_n210_r4_fpga.bit
/usr/share/uhd/images/erllc_uhd.cat
/usr/share/uhd/images/erllc_uhd_b100.inf
/usr/share/uhd/images/erllc_uhd_b200.inf
/usr/share/uhd/images/erllc_uhd_b200_reinit.inf
/usr/share/uhd/images/erllc_uhd_b200mini.inf
/usr/share/uhd/images/erllc_uhd_b205mini.inf
/usr/share/uhd/images/erllc_uhd_b206mini.inf
/usr/share/uhd/images/erllc_uhd_makecat.cdf
/usr/share/uhd/images/erllc_uhd_ni29xx.inf
/usr/share/uhd/images/erllc_uhd_usrp1.inf
/usr/share/uhd/images/inventory.json
/usr/share/uhd/images/octoclock_bootloader.hex
/usr/share/uhd/images/octoclock_r4_fw.hex
/usr/share/uhd/images/usrp1_fpga.rbf
/usr/share/uhd/images/usrp1_fpga_4rx.rbf
/usr/share/uhd/images/usrp1_fw.ihx
/usr/share/uhd/images/usrp2_fpga.bin
/usr/share/uhd/images/usrp2_fw.bin
/usr/share/uhd/images/usrp_b100_fpga.bin
/usr/share/uhd/images/usrp_b100_fpga_2rx.bin
/usr/share/uhd/images/usrp_b100_fw.ihx
/usr/share/uhd/images/usrp_b200_bl.img
/usr/share/uhd/images/usrp_b200_fpga.bin
/usr/share/uhd/images/usrp_b200_fpga.rpt
/usr/share/uhd/images/usrp_b200_fw.hex
/usr/share/uhd/images/usrp_b200mini_fpga.bin
/usr/share/uhd/images/usrp_b200mini_fpga.rpt
/usr/share/uhd/images/usrp_b205mini_fpga.bin
/usr/share/uhd/images/usrp_b205mini_fpga.rpt
/usr/share/uhd/images/usrp_b210_fpga.bin
/usr/share/uhd/images/usrp_b210_fpga.rpt
/usr/share/uhd/images/usrp_e310_sg1_fpga.bit
/usr/share/uhd/images/usrp_e310_sg1_fpga.bit.md5
/usr/share/uhd/images/usrp_e310_sg1_fpga.dts
/usr/share/uhd/images/usrp_e310_sg1_fpga.dts.md5
/usr/share/uhd/images/usrp_e310_sg1_fpga.rpt
/usr/share/uhd/images/usrp_e310_sg1_idle_fpga.bit
/usr/share/uhd/images/usrp_e310_sg1_idle_fpga.bit.md5
/usr/share/uhd/images/usrp_e310_sg1_idle_fpga.dts
/usr/share/uhd/images/usrp_e310_sg1_idle_fpga.dts.md5
/usr/share/uhd/images/usrp_e310_sg1_idle_fpga.rpt
/usr/share/uhd/images/usrp_e310_sg3_fpga.bit
/usr/share/uhd/images/usrp_e310_sg3_fpga.bit.md5
/usr/share/uhd/images/usrp_e310_sg3_fpga.dts
/usr/share/uhd/images/usrp_e310_sg3_fpga.dts.md5
/usr/share/uhd/images/usrp_e310_sg3_fpga.rpt
/usr/share/uhd/images/usrp_e310_sg3_idle_fpga.bit
/usr/share/uhd/images/usrp_e310_sg3_idle_fpga.bit.md5
/usr/share/uhd/images/usrp_e310_sg3_idle_fpga.dts
/usr/share/uhd/images/usrp_e310_sg3_idle_fpga.dts.md5
/usr/share/uhd/images/usrp_e310_sg3_idle_fpga.rpt
/usr/share/uhd/images/usrp_e320_fpga_1G.bit
/usr/share/uhd/images/usrp_e320_fpga_1G.bit.md5
/usr/share/uhd/images/usrp_e320_fpga_1G.dts
/usr/share/uhd/images/usrp_e320_fpga_1G.dts.md5
/usr/share/uhd/images/usrp_e320_fpga_1G.rpt
/usr/share/uhd/images/usrp_e320_fpga_AA.bit
/usr/share/uhd/images/usrp_e320_fpga_AA.bit.md5
/usr/share/uhd/images/usrp_e320_fpga_AA.dts
/usr/share/uhd/images/usrp_e320_fpga_AA.dts.md5
/usr/share/uhd/images/usrp_e320_fpga_AA.rpt
/usr/share/uhd/images/usrp_e320_fpga_XG.bit
/usr/share/uhd/images/usrp_e320_fpga_XG.bit.md5
/usr/share/uhd/images/usrp_e320_fpga_XG.dts
/usr/share/uhd/images/usrp_e320_fpga_XG.dts.md5
/usr/share/uhd/images/usrp_e320_fpga_XG.rpt
/usr/share/uhd/images/usrp_n200_fw.bin
/usr/share/uhd/images/usrp_n200_r2_fpga.bin
/usr/share/uhd/images/usrp_n200_r3_fpga.bin
/usr/share/uhd/images/usrp_n200_r4_fpga.bin
/usr/share/uhd/images/usrp_n210_fw.bin
/usr/share/uhd/images/usrp_n210_r2_fpga.bin
/usr/share/uhd/images/usrp_n210_r3_fpga.bin
/usr/share/uhd/images/usrp_n210_r4_fpga.bin
/usr/share/uhd/images/usrp_n300_fpga_AA.bit
/usr/share/uhd/images/usrp_n300_fpga_AA.bit.md5
/usr/share/uhd/images/usrp_n300_fpga_AA.dts
/usr/share/uhd/images/usrp_n300_fpga_AA.dts.md5
/usr/share/uhd/images/usrp_n300_fpga_AA.rpt
/usr/share/uhd/images/usrp_n300_fpga_HG.bit
/usr/share/uhd/images/usrp_n300_fpga_HG.bit.md5
/usr/share/uhd/images/usrp_n300_fpga_HG.dts
/usr/share/uhd/images/usrp_n300_fpga_HG.dts.md5
/usr/share/uhd/images/usrp_n300_fpga_HG.rpt
/usr/share/uhd/images/usrp_n300_fpga_WX.bit
/usr/share/uhd/images/usrp_n300_fpga_WX.bit.md5
/usr/share/uhd/images/usrp_n300_fpga_WX.dts
/usr/share/uhd/images/usrp_n300_fpga_WX.dts.md5
/usr/share/uhd/images/usrp_n300_fpga_WX.rpt
/usr/share/uhd/images/usrp_n300_fpga_XG.bit
/usr/share/uhd/images/usrp_n300_fpga_XG.bit.md5
/usr/share/uhd/images/usrp_n300_fpga_XG.dts
/usr/share/uhd/images/usrp_n300_fpga_XG.dts.md5
/usr/share/uhd/images/usrp_n300_fpga_XG.rpt
/usr/share/uhd/images/usrp_n310_fpga_AA.bit
/usr/share/uhd/images/usrp_n310_fpga_AA.bit.md5
/usr/share/uhd/images/usrp_n310_fpga_AA.dts
/usr/share/uhd/images/usrp_n310_fpga_AA.dts.md5
/usr/share/uhd/images/usrp_n310_fpga_AA.rpt
/usr/share/uhd/images/usrp_n310_fpga_HG.bit
/usr/share/uhd/images/usrp_n310_fpga_HG.bit.md5
/usr/share/uhd/images/usrp_n310_fpga_HG.dts
/usr/share/uhd/images/usrp_n310_fpga_HG.dts.md5
/usr/share/uhd/images/usrp_n310_fpga_HG.rpt
/usr/share/uhd/images/usrp_n310_fpga_WX.bit
/usr/share/uhd/images/usrp_n310_fpga_WX.bit.md5
/usr/share/uhd/images/usrp_n310_fpga_WX.dts
/usr/share/uhd/images/usrp_n310_fpga_WX.dts.md5
/usr/share/uhd/images/usrp_n310_fpga_WX.rpt
/usr/share/uhd/images/usrp_n310_fpga_XG.bit
/usr/share/uhd/images/usrp_n310_fpga_XG.bit.md5
/usr/share/uhd/images/usrp_n310_fpga_XG.dts
/usr/share/uhd/images/usrp_n310_fpga_XG.dts.md5
/usr/share/uhd/images/usrp_n310_fpga_XG.rpt
/usr/share/uhd/images/usrp_n320_fpga_AA.bit
/usr/share/uhd/images/usrp_n320_fpga_AA.bit.md5
/usr/share/uhd/images/usrp_n320_fpga_AA.dts
/usr/share/uhd/images/usrp_n320_fpga_AA.dts.md5
/usr/share/uhd/images/usrp_n320_fpga_AA.rpt
/usr/share/uhd/images/usrp_n320_fpga_AQ.bit
/usr/share/uhd/images/usrp_n320_fpga_AQ.bit.md5
/usr/share/uhd/images/usrp_n320_fpga_AQ.dts
/usr/share/uhd/images/usrp_n320_fpga_AQ.dts.md5
/usr/share/uhd/images/usrp_n320_fpga_AQ.rpt
/usr/share/uhd/images/usrp_n320_fpga_HG.bit
/usr/share/uhd/images/usrp_n320_fpga_HG.bit.md5
/usr/share/uhd/images/usrp_n320_fpga_HG.dts
/usr/share/uhd/images/usrp_n320_fpga_HG.dts.md5
/usr/share/uhd/images/usrp_n320_fpga_HG.rpt
/usr/share/uhd/images/usrp_n320_fpga_WX.bit
/usr/share/uhd/images/usrp_n320_fpga_WX.bit.md5
/usr/share/uhd/images/usrp_n320_fpga_WX.dts
/usr/share/uhd/images/usrp_n320_fpga_WX.dts.md5
/usr/share/uhd/images/usrp_n320_fpga_WX.rpt
/usr/share/uhd/images/usrp_n320_fpga_XG.bit
/usr/share/uhd/images/usrp_n320_fpga_XG.bit.md5
/usr/share/uhd/images/usrp_n320_fpga_XG.dts
/usr/share/uhd/images/usrp_n320_fpga_XG.dts.md5
/usr/share/uhd/images/usrp_n320_fpga_XG.rpt
/usr/share/uhd/images/usrp_n320_fpga_XQ.bit
/usr/share/uhd/images/usrp_n320_fpga_XQ.bit.md5
/usr/share/uhd/images/usrp_n320_fpga_XQ.dts
/usr/share/uhd/images/usrp_n320_fpga_XQ.dts.md5
/usr/share/uhd/images/usrp_n320_fpga_XQ.rpt
/usr/share/uhd/images/usrp_x300_fpga_HG.bit
/usr/share/uhd/images/usrp_x300_fpga_HG.lvbitx
/usr/share/uhd/images/usrp_x300_fpga_HG.rpt
/usr/share/uhd/images/usrp_x300_fpga_XG.bit
/usr/share/uhd/images/usrp_x300_fpga_XG.lvbitx
/usr/share/uhd/images/usrp_x300_fpga_XG.rpt
/usr/share/uhd/images/usrp_x310_fpga_HG.bit
/usr/share/uhd/images/usrp_x310_fpga_HG.lvbitx
/usr/share/uhd/images/usrp_x310_fpga_HG.rpt
/usr/share/uhd/images/usrp_x310_fpga_XG.bit
/usr/share/uhd/images/usrp_x310_fpga_XG.lvbitx
/usr/share/uhd/images/usrp_x310_fpga_XG.rpt
/usr/share/uhd/images/usrp_x410_fpga_CG_400.bit
/usr/share/uhd/images/usrp_x410_fpga_CG_400.bit.md5
/usr/share/uhd/images/usrp_x410_fpga_CG_400.dts
/usr/share/uhd/images/usrp_x410_fpga_CG_400.dts.md5
/usr/share/uhd/images/usrp_x410_fpga_CG_400.rpt
/usr/share/uhd/images/usrp_x410_fpga_UC_200.bit
/usr/share/uhd/images/usrp_x410_fpga_UC_200.bit.md5
/usr/share/uhd/images/usrp_x410_fpga_UC_200.dts
/usr/share/uhd/images/usrp_x410_fpga_UC_200.dts.md5
/usr/share/uhd/images/usrp_x410_fpga_UC_200.rpt
/usr/share/uhd/images/usrp_x410_fpga_X4_200.bit
/usr/share/uhd/images/usrp_x410_fpga_X4_200.bit.md5
/usr/share/uhd/images/usrp_x410_fpga_X4_200.dts
/usr/share/uhd/images/usrp_x410_fpga_X4_200.dts.md5
/usr/share/uhd/images/usrp_x410_fpga_X4_200.rpt
/usr/share/uhd/images/usrp_x440_fpga_CG_1600.bit
/usr/share/uhd/images/usrp_x440_fpga_CG_1600.bit.md5
/usr/share/uhd/images/usrp_x440_fpga_CG_1600.dts
/usr/share/uhd/images/usrp_x440_fpga_CG_1600.dts.md5
/usr/share/uhd/images/usrp_x440_fpga_CG_1600.rpt
/usr/share/uhd/images/usrp_x440_fpga_CG_400.bit
/usr/share/uhd/images/usrp_x440_fpga_CG_400.bit.md5
/usr/share/uhd/images/usrp_x440_fpga_CG_400.dts
/usr/share/uhd/images/usrp_x440_fpga_CG_400.dts.md5
/usr/share/uhd/images/usrp_x440_fpga_CG_400.rpt
/usr/share/uhd/images/usrp_x440_fpga_X4_1600.bit
/usr/share/uhd/images/usrp_x440_fpga_X4_1600.bit.md5
/usr/share/uhd/images/usrp_x440_fpga_X4_1600.dts
/usr/share/uhd/images/usrp_x440_fpga_X4_1600.dts.md5
/usr/share/uhd/images/usrp_x440_fpga_X4_1600.rpt
/usr/share/uhd/images/usrp_x440_fpga_X4_200.bit
/usr/share/uhd/images/usrp_x440_fpga_X4_200.bit.md5
/usr/share/uhd/images/usrp_x440_fpga_X4_200.dts
/usr/share/uhd/images/usrp_x440_fpga_X4_200.dts.md5
/usr/share/uhd/images/usrp_x440_fpga_X4_200.rpt
/usr/share/uhd/images/usrp_x440_fpga_X4_400.bit
/usr/share/uhd/images/usrp_x440_fpga_X4_400.bit.md5
/usr/share/uhd/images/usrp_x440_fpga_X4_400.dts
/usr/share/uhd/images/usrp_x440_fpga_X4_400.dts.md5
/usr/share/uhd/images/usrp_x440_fpga_X4_400.rpt

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Fabrice Bellet, Thu Nov 20 22:02:15 2025