iverilog-13.0-7.el10_3 RPM for aarch64

From EPEL 10.3 for aarch64 / Packages / i

Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard.

Provides

• iverilog
• iverilog(aarch-64)

Requires

• /usr/bin/sh
• ld-linux-aarch64.so.1()(64bit)
• ld-linux-aarch64.so.1(GLIBC_2.17)(64bit)
• libbz2.so.1()(64bit)
• libc.so.6()(64bit)
• libc.so.6(GLIBC_2.17)(64bit)
• libc.so.6(GLIBC_2.33)(64bit)
• libc.so.6(GLIBC_2.34)(64bit)
• libc.so.6(GLIBC_2.38)(64bit)
• libc.so.6(GLIBC_ABI_DT_RELR)(64bit)
• libgcc_s.so.1()(64bit)
• libgcc_s.so.1(GCC_3.0)(64bit)
• libgcc_s.so.1(GCC_3.3.1)(64bit)
• libm.so.6()(64bit)
• libm.so.6(GLIBC_2.17)(64bit)
• libm.so.6(GLIBC_2.29)(64bit)
• libm.so.6(GLIBC_2.35)(64bit)
• libm.so.6(GLIBC_2.38)(64bit)
• libreadline.so.8()(64bit)
• libstdc++.so.6()(64bit)
• libstdc++.so.6(CXXABI_1.3)(64bit)
• libstdc++.so.6(CXXABI_1.3.8)(64bit)
• libstdc++.so.6(GLIBCXX_3.4)(64bit)
• libstdc++.so.6(GLIBCXX_3.4.11)(64bit)
• libstdc++.so.6(GLIBCXX_3.4.15)(64bit)
• libstdc++.so.6(GLIBCXX_3.4.18)(64bit)
• libstdc++.so.6(GLIBCXX_3.4.20)(64bit)
• libstdc++.so.6(GLIBCXX_3.4.21)(64bit)
• libstdc++.so.6(GLIBCXX_3.4.22)(64bit)
• libstdc++.so.6(GLIBCXX_3.4.26)(64bit)
• libstdc++.so.6(GLIBCXX_3.4.29)(64bit)
• libstdc++.so.6(GLIBCXX_3.4.30)(64bit)
• libstdc++.so.6(GLIBCXX_3.4.32)(64bit)
• libstdc++.so.6(GLIBCXX_3.4.9)(64bit)
• libz.so.1()(64bit)
• libz.so.1(ZLIB_1.2.0)(64bit)
• rpmlib(CompressedFileNames) <= 3.0.4-1
• rpmlib(FileDigests) <= 4.6.0-1
• rpmlib(PayloadFilesHavePrefix) <= 4.0-1
• rpmlib(PayloadIsZstd) <= 5.4.18-1
• rtld(GNU_HASH)

License

GPL-2.0-only

Changelog

* Mon Jun 08 2026 Filipe Rosset <rosset.filipe@gmail.com> - 13.0-7
  - simplify .gitignore
* Mon Jun 08 2026 Filipe Rosset <rosset.filipe@gmail.com> - 13.0-6
  - split iverilog in devel, static and binary packages
* Mon Jun 08 2026 Filipe Rosset <rosset.filipe@gmail.com> - 13.0-5
  - opt-in to packit
* Wed Mar 04 2026 Filipe Rosset <rosset.filipe@gmail.com> - 13.0-4
  - build documentation with python3-sphinx
* Wed Mar 04 2026 Filipe Rosset <rosset.filipe@gmail.com> - 13.0-3
  - added README.md to documentation
* Wed Mar 04 2026 Filipe Rosset <rosset.filipe@gmail.com> - 13.0-2
  - uploaded sources, remove upstreamed patch
* Wed Mar 04 2026 Filipe Rosset <rosset.filipe@gmail.com> - 13.0-1
  - update to iverilog-13, fixes rhbz#2443718
* Fri Jan 16 2026 Fedora Release Engineering <releng@fedoraproject.org> - 12.0-12
  - Rebuilt for https://fedoraproject.org/wiki/Fedora_44_Mass_Rebuild
* Thu Jul 24 2025 Fedora Release Engineering <releng@fedoraproject.org> - 12.0-11
  - Rebuilt for https://fedoraproject.org/wiki/Fedora_43_Mass_Rebuild
* Fri Jan 17 2025 Fedora Release Engineering <releng@fedoraproject.org> - 12.0-10
  - Rebuilt for https://fedoraproject.org/wiki/Fedora_42_Mass_Rebuild
* Mon Jul 29 2024 Miroslav Suchý <msuchy@redhat.com> - 12.0-9
  - convert GPLv2 license to SPDX
* Thu Jul 18 2024 Fedora Release Engineering <releng@fedoraproject.org> - 12.0-8
  - Rebuilt for https://fedoraproject.org/wiki/Fedora_41_Mass_Rebuild

Files

/usr/bin/iverilog
/usr/bin/iverilog-vpi
/usr/bin/vvp
/usr/lib/.build-id
/usr/lib/.build-id/07
/usr/lib/.build-id/07/d328bbafb68b870e037bc0ea6a85681adbd344
/usr/lib/.build-id/17
/usr/lib/.build-id/17/c71dd94f9ecb65a60593aa0be3b93e4d86375a
/usr/lib/.build-id/1f
/usr/lib/.build-id/1f/a62c497e0a4c98136f4f9b21e34578d2e9b74b
/usr/lib/.build-id/24
/usr/lib/.build-id/24/14e1d5ca80ac495cec1179e6d68e1ef9daf0e4
/usr/lib/.build-id/39
/usr/lib/.build-id/39/c2f2287281cb36f17c87ce023435b9c3113b9a
/usr/lib/.build-id/3e
/usr/lib/.build-id/3e/ef01db71b46f10f3d6f087090b1045a3d60c1f
/usr/lib/.build-id/46
/usr/lib/.build-id/46/baf6e1de23ff711cb5bbc2217997366c0ac84a
/usr/lib/.build-id/56
/usr/lib/.build-id/56/bbfa8f8c622b14493b9e147015cc9c8e2b3938
/usr/lib/.build-id/66
/usr/lib/.build-id/66/3601e50a83444563dab6fcf03e5e4478e5735c
/usr/lib/.build-id/70
/usr/lib/.build-id/70/30fd00768d103f6740c0e625404977590fb98b
/usr/lib/.build-id/7b
/usr/lib/.build-id/7b/6a03ed8f19c07c953c5223829253ec87bed51e
/usr/lib/.build-id/9d
/usr/lib/.build-id/9d/492652216a3d76e693ed202f99aa8c1d6d4c60
/usr/lib/.build-id/a2
/usr/lib/.build-id/a2/065064c528bfb6c5593e963b3e389752887ce3
/usr/lib/.build-id/bc
/usr/lib/.build-id/bc/77da6f0de1c261b199b430ac70cf05932f8c41
/usr/lib/.build-id/c4
/usr/lib/.build-id/c4/12fd1069a8b00294f3ae984637b4adca96cc5e
/usr/lib/.build-id/c6
/usr/lib/.build-id/c6/ec116e1e516034b21f3c3c55a9c169bfbb38bf
/usr/lib/.build-id/d3
/usr/lib/.build-id/d3/1445a6cb0aa40ea79739692f4287c955238d6f
/usr/lib/.build-id/e0
/usr/lib/.build-id/e0/9a93f69ecf896eebec093fde15ec1e50ac014f
/usr/lib/.build-id/e2
/usr/lib/.build-id/e2/63f965d3556d7ecb00e4c05dbef6b7783ce1c3
/usr/lib/.build-id/fd
/usr/lib/.build-id/fd/574d7df5e8576077495f204c8795198e24de53
/usr/lib64/ivl
/usr/lib64/ivl/blif-s.conf
/usr/lib64/ivl/blif.conf
/usr/lib64/ivl/blif.tgt
/usr/lib64/ivl/include
/usr/lib64/ivl/include/constants.vams
/usr/lib64/ivl/include/disciplines.vams
/usr/lib64/ivl/ivl
/usr/lib64/ivl/ivlpp
/usr/lib64/ivl/null-s.conf
/usr/lib64/ivl/null.conf
/usr/lib64/ivl/null.tgt
/usr/lib64/ivl/pcb-s.conf
/usr/lib64/ivl/pcb.conf
/usr/lib64/ivl/pcb.tgt
/usr/lib64/ivl/sizer-s.conf
/usr/lib64/ivl/sizer.conf
/usr/lib64/ivl/sizer.tgt
/usr/lib64/ivl/stub-s.conf
/usr/lib64/ivl/stub.conf
/usr/lib64/ivl/stub.tgt
/usr/lib64/ivl/system.vpi
/usr/lib64/ivl/v2005_math.vpi
/usr/lib64/ivl/v2009.vpi
/usr/lib64/ivl/va_math.vpi
/usr/lib64/ivl/vhdl-s.conf
/usr/lib64/ivl/vhdl.conf
/usr/lib64/ivl/vhdl.tgt
/usr/lib64/ivl/vhdl_sys.vpi
/usr/lib64/ivl/vhdl_textio.vpi
/usr/lib64/ivl/vhdlpp
/usr/lib64/ivl/vlog95-s.conf
/usr/lib64/ivl/vlog95.conf
/usr/lib64/ivl/vlog95.tgt
/usr/lib64/ivl/vpi_debug.vpi
/usr/lib64/ivl/vvp-s.conf
/usr/lib64/ivl/vvp.conf
/usr/lib64/ivl/vvp.tgt
/usr/share/doc/iverilog
/usr/share/doc/iverilog/README.md
/usr/share/doc/iverilog/examples
/usr/share/doc/iverilog/examples/clbff.v
/usr/share/doc/iverilog/examples/des.v
/usr/share/doc/iverilog/examples/hello.vl
/usr/share/doc/iverilog/examples/hello_vpi.c
/usr/share/doc/iverilog/examples/hello_vpi.vl
/usr/share/doc/iverilog/examples/outff.v
/usr/share/doc/iverilog/examples/pal_reg.v
/usr/share/doc/iverilog/examples/show_vcd.vl
/usr/share/doc/iverilog/examples/sqrt-virtex.v
/usr/share/doc/iverilog/examples/sqrt.vl
/usr/share/doc/iverilog/examples/xnf_add.vl
/usr/share/doc/iverilog/examples/xram16x1.v
/usr/share/doc/iverilog/html
/usr/share/doc/iverilog/html/_images
/usr/share/doc/iverilog/html/_images/GTKWave_Example2.png
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/usr/share/doc/iverilog/html/_static
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Fabrice Bellet, Wed Aug 12 04:12:17 2026